From a9c70b0c2d6a30e93194d87e61068e7be14d0415 Mon Sep 17 00:00:00 2001
From: Samuel Onoja <samiodev@icloud.com>
Date: Thu, 24 Sep 2026 16:45:28 +0100
Subject: [PATCH] fix: redraw direct output after session resume

---
 compositor/src/backends/direct.rs | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/compositor/src/backends/direct.rs b/compositor/src/backends/direct.rs
index d1dfbc4..123dc7e 100644
--- a/compositor/src/backends/direct.rs
+++ b/compositor/src/backends/direct.rs
@@ -104,9 +104,11 @@ pub fn init(event_loop: &mut EventLoop<Ferese>, state: &mut Ferese) -> Result<()
             SessionEvent::PauseSession => {
                 if let Some(backend) = state.direct_backend.as_mut() {
                     backend.active = false;
+                    backend.presentation.reset_timing();
                     backend.devices.values_mut().for_each(|device| {
                         device.drm.pause();
                         device.surface.reset_buffers();
+                        device.damage_tracker = OutputDamageTracker::from_output(&device.output);
                         device.frame_pending = false;
                     });
                 }
@@ -458,6 +460,10 @@ impl DirectBackendState {
 }
 
 impl PresentationClock {
+    fn reset_timing(&mut self) {
+        self.last_presentation = None;
+    }
+
     fn set_refresh(&mut self, refresh_millihertz: i32) {
         if refresh_millihertz > 0 {
             self.refresh_interval = Some(Duration::from_nanos(
@@ -543,4 +549,20 @@ mod tests {
 
         assert_eq!(clock.missed_deadlines, 2);
     }
+
+    #[test]
+    fn presentation_clock_excludes_inactive_session_time() {
+        let mut clock = PresentationClock::default();
+        clock.set_refresh(60_000);
+        clock.record(DrmEventTime::Monotonic(Duration::from_millis(100)), 1);
+
+        clock.reset_timing();
+
+        assert_eq!(
+            clock.record(DrmEventTime::Monotonic(Duration::from_secs(10)), 2),
+            None
+        );
+        assert_eq!(clock.presented_frames, 2);
+        assert_eq!(clock.missed_deadlines, 0);
+    }
 }